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ASYNC
2007
IEEE
132views Hardware» more  ASYNC 2007»
13 years 11 months ago
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
Future deep sub-micron technologies will be characterized by large parametric variations, which could make asynchronous design an attractive solution for use on large scale. Howev...
Tiberiu Chelcea, Girish Venkataramani, Seth Copen ...
DAC
2001
ACM
14 years 6 months ago
Transformations for the Synthesis and Optimization of Asynchronous Distributed Control
Asynchronous design has been the focus of renewed interest. However, a key bottleneck is the lack of high-quality CAD tools for the synthesis of large-scale systems which also all...
Michael Theobald, Steven M. Nowick