ASYNC
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, both dualrail as well as ...
ASYNC
2002
IEEE
13 years 9 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...