VTS
1995
IEEE
13 years 8 months ago
1995
IEEE
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
ETS
2006
IEEE
13 years 10 months ago
2006
IEEE
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...