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    2009
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    Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
    14 years 5 months ago
    Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
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    Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
    Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
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