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CASES
2010
ACM
9 years 2 months ago
Optimizing energy to minimize errors in dataflow graphs using approximate adders
Approximate arithmetic is a promising, new approach to lowenergy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among...
Zvi M. Kedem, Vincent John Mooney, Kirthi Krishna ...
CASES
2010
ACM
9 years 3 months ago
Hardware trust implications of 3-D integration
3-D circuit-level integration is a chip fabrication technique in which two or more dies are stacked and combined into a single circuit through the use of vertical electroconductiv...
Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cy...
CASES
2010
ACM
9 years 3 months ago
Fine-grain dynamic instruction placement for L0 scratch-pad memory
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
JongSoo Park, James D. Balfour, William J. Dally
CASES
2010
ACM
9 years 3 months ago
Hardware-based data value and address trace filtering techniques
Vladimir Uzelac, Aleksandar Milenkovic
CASES
2010
ACM
9 years 3 months ago
Improving scratchpad allocation with demand-driven data tiling
Xuejun Yang, Li Wang, Jingling Xue, Tao Tang, Xiao...
CASES
2010
ACM
9 years 3 months ago
Real-time unobtrusive program execution trace compression using branch predictor events
Unobtrusive capturing of program execution traces in real-time is crucial in debugging cyber-physical systems. However, tracing even limited program segments is often cost-prohibi...
Vladimir Uzelac, Aleksandar Milenkovic, Martin Bur...
CASES
2010
ACM
9 years 3 months ago
Instruction selection by graph transformation
Common generated instruction selections are based on tree pattern matching, but modern and custom architectures feature instructions, which cannot be covered by trees. To overcome...
Sebastian Buchwald, Andreas Zwinkau
CASES
2010
ACM
9 years 3 months ago
Mighty-morphing power-SIMD
In modern wireless devices, two broad classes of compute-intensive applications are common: those with high amounts of data-level parallelism, such as signal processing used in wi...
Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Cl...
CASES
2010
ACM
9 years 3 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
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