Sciweavers

CF
2005
ACM
13 years 6 months ago
Grid result checking
Result checking is the theory and practice of proving that the result of an execution of a program on an input is correct. Result checking has most often been envisioned in the fr...
Cécile Germain-Renaud, Dephine Monnier-Raga...
CF
2005
ACM
13 years 6 months ago
On the energy-efficiency of speculative hardware
Microprocessor trends are moving towards wider architectures and more aggressive speculation. With the increasing transistor budgets, energy consumption has become a critical desi...
Nana B. Sam, Martin Burtscher
CF
2005
ACM
13 years 6 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
CF
2005
ACM
13 years 6 months ago
Marching-pixels: a new organic computing paradigm for smart sensor processor arrays
In this paper we present a new organic computing principle denoted as marching pixels for the architectures of future smart CMOS camera chips. The idea of marching pixels is based...
Dietmar Fey, Daniel Schmidt 0003
CF
2005
ACM
13 years 6 months ago
Exploiting temporal locality in drowsy cache policies
Technology projections indicate that static power will become a major concern in future generations of high-performance microprocessors. Caches represent a significant percentage ...
Salvador Petit, Julio Sahuquillo, Jose M. Such, Da...
CF
2005
ACM
13 years 6 months ago
Reversible logic for supercomputing
This paper is about making reversible logic a reality for supercomputing. Reversible logic offers a way to exceed certain basic limits on the performance of computers, yet a power...
Erik DeBenedictis
CF
2005
ACM
13 years 6 months ago
Exploiting processor groups to extend scalability of the GA shared memory programming model
Exploiting processor groups is becoming increasingly important for programming next-generation high-end systems composed of tens or hundreds of thousands of processors. This paper...
Jarek Nieplocha, Manojkumar Krishnan, Bruce Palmer...
CF
2005
ACM
13 years 6 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
CF
2005
ACM
13 years 6 months ago
Dynamic loop pipelining in data-driven architectures
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
João M. P. Cardoso
CF
2005
ACM
13 years 6 months ago
Dynamic run-time architecture techniques for enabling continuous optimization
Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matth...