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    DAC
    2005
    ACM
    94views Computer Architecture» more  DAC 2005»
    Logic block clustering of large designs for channel-width constrained FPGAs
    14 years 5 months ago
    Logic block clustering of large designs for channel-width constrained FPGAs
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    In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
    Marvin Tom, Guy G. Lemieux
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