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    DAC
    2005
    ACM
    117views Computer Architecture» more  DAC 2005»
    Circuit optimization using statistical static timing analysis
    13 years 6 months ago
    Circuit optimization using statistical static timing analysis
    Download  www.cecs.uci.edu
    In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
    Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
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