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ASPDAC
2012
ACM
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12 years 14 days ago
Through-silicon-via-induced obstacle-aware clock tree synthesis for 3D ICs
— In this paper, we present an obstacle-aware clock tree synthesis method for through-silicon-via (TSV)-based 3D ICs. A unique aspect of this problem lies in the fact that variou...
Xin Zhao, Sung Kyu Lim
DAC
2005
ACM
13 years 6 months ago
Minimizing peak current via opposite-phase clock tree
Although a lot of research efforts have been made in the minimization of the total power consumption caused by the clock tree, no attention has been paid to the minimization of th...
Yow-Tyng Nieh, Shih-Hsu Huang, Sheng-Yu Hsu