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    DDECS
    2009
    IEEE
    95views Hardware» more  DDECS 2009»
    Self-timed full adder designs based on hybrid input encoding
    14 years 10 days ago
    Self-timed full adder designs based on hybrid input encoding
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    —Self-timed full adder designs based on commercial synchronous resources (standard cells), constructed using a mix of complete delay-insensitive codes adopted for inputs are desc...
    Padnamabhan Balasubramanian, D. A. Edwards, C. Bre...
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