MICRO
1999
IEEE
13 years 9 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
AL-ZAWAWI, AHMED SAMI. Transparent Control Independence (TCI). (Under the direction of Dr. Eric Rotenberg). Superscalar architectures have been proposed that exploit control indep...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
Architectures that exploit control independence (CI) promise to remove in-order fetch bottlenecks, like branch mispredicts, instruction-cache misses and fetch unit stalls, from th...