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ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
12 years 4 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
ICS
1999
Tsinghua U.
12 years 4 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache ef´Čüciency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ICS
2001
Tsinghua U.
12 years 4 months ago
Cache performance for multimedia applications
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
Nathan T. Slingerland, Alan Jay Smith
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