Sciweavers

TVLSI
2008
140views more  TVLSI 2008»
13 years 3 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad
DAC
1994
ACM
13 years 7 months ago
Error Diagnosis for Transistor-Level Verification
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...
VLSID
2000
IEEE
95views VLSI» more  VLSID 2000»
13 years 8 months ago
Hierarchical Error Diagnosis Targeting RTL Circuits
Diagnosis algorithms targeting design errors in RTL circuit descriptions are presented in this paper. The algorithms presented exploit the hierarchy available in RTL designs to lo...
Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee...
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
13 years 9 months ago
Creating Value Through Test
Test is often seen as a necessary evil; it is a fact of life that ICs have manufacturing defects and those need to be filtered out by testing before the ICs are shipped to the cu...
Erik Jan Marinissen, Bart Vermeulen, Robert Madge,...
ICCD
2006
IEEE
133views Hardware» more  ICCD 2006»
14 years 17 days ago
Patching Processor Design Errors
— Microprocessors can have design errors that escape the test and validation process. The cost to rectify these errors after shipping the processors can be very expensive as it m...
Satish Narayanasamy, Bruce Carneal, Brad Calder