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CDES
2006
149views Hardware» more  CDES 2006»
9 years 5 months ago
Crosstalk at the Dynamic Node of Domino CMOS Circuits
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...
Waleed Al-Assadi, Vipin Sharma, Pavankumar Chandra...
ICCAD
2000
IEEE
72views Hardware» more  ICCAD 2000»
9 years 8 months ago
Synthesis of CMOS Domino Circuits for Charge Sharing Alleviation
The Charge Sharing (CS) problem is one of notorious noise problems in domino circuits design and test. In this paper, this problem is thoroughly investigated by considering circui...
Ching-Hwa Cheng, Shih-Chieh Chang, Shin-De Li, Wen...
ISCAS
2002
IEEE
91views Hardware» more  ISCAS 2002»
9 years 8 months ago
Efficient digit-serial FIR filters with skew-tolerant domino
A novel connection between digit-serialcomputationand skew-tolerant domino circuit design is exploited to create very efficient implementations of FIR digital filters. In our ap...
Sungwook Kim, Gerald E. Sobelman
ICCAD
2003
IEEE
135views Hardware» more  ICCAD 2003»
9 years 9 months ago
ATPG for Noise-Induced Switch Failures in Domino Logic
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
Rahul Kundu, R. D. (Shawn) Blanton
DAC
2004
ACM
10 years 4 months ago
Post-layout logic optimization of domino circuits
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
Aiqun Cao, Cheng-Kok Koh
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