DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Serial arithmetic uses less hardware than parallel arithmetic. Serial floating point (FP) is slower than parallel FP. The Logarithmic Number System (LNS) simplifies operations, ...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract. In an embedded multiprocessor system the minimum throughput and maximum latency of real-time applications are usually derived given the worst-case execution time of the s...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built-in self-test design meth...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
Developing highly efficient and reliable embedded systems demands hardware/software (HW/SW) co-design and, therefore, co-simulation. In order to be highly configurable, embedded...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
The reduction of the cumbersome operations of multiplication, division, and powering to addition, subtraction and multiplication is what makes the Logarithmic Number System (LNS) ...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE