DSD
2009
IEEE
13 years 8 months ago
2009
IEEE
Many reversible circuit synthesis procedures have been proposed. A common feature of most methods is that the initial specification must be a completely-specified reversible functi...
DSD
2009
IEEE
13 years 8 months ago
2009
IEEE
This paper shows a method to reduce the number of input variables to represent incompletely specified index generation functions. A compound variable is generated by EXORing the o...
DSD
2009
IEEE
13 years 8 months ago
2009
IEEE
Voltage-frequency scaling (VFS) trades a linear processor slowdown for a potentially quadratic reduction in energy consumption. Complex dependencies may exist between different tas...
DSD
2009
IEEE
13 years 8 months ago
2009
IEEE
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
—As CMOS process technology advances towards 32nm, SoC complexity continuously grows but its dependability significantly decreases. In this paper, a beamforming chip 1 is designe...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
Multicore and manycore processors are the new wave of computing, offering high performance by using large numbers of simple processors. In this paper, we describe the implementati...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
—We present experiments with synthesis tools using examples which are currently believed to be very hard, namely the LEKU examples by Cong and Minkovich and parity examples of ou...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...