Sciweavers

IOLTS
2008
IEEE
112views Hardware» more  IOLTS 2008»
13 years 11 months ago
A Modular Memory BIST for Optimized Memory Repair
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
Philipp Öhler, Alberto Bosio, Giorgio Di Nata...