Sciweavers

Share
warning: Creating default object from empty value in /var/www/modules/taxonomy/taxonomy.module on line 1416.
ERSA
2004
192views Hardware» more  ERSA 2004»
10 years 4 months ago
VTSim: A Virtex-II Device Simulator
This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
Jesse Hunter, Peter Athanas, Cameron Patterson
ERSA
2004
118views Hardware» more  ERSA 2004»
10 years 4 months ago
Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
Paul M. Heysters, Gerard J. M. Smit, Egbert Molenk...
ERSA
2004
130views Hardware» more  ERSA 2004»
10 years 4 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna
ERSA
2004
148views Hardware» more  ERSA 2004»
10 years 4 months ago
Efficient Floating-point Based Block LU Decomposition on FPGAs
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
ERSA
2004
134views Hardware» more  ERSA 2004»
10 years 4 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
ERSA
2004
129views Hardware» more  ERSA 2004»
10 years 4 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
ERSA
2004
106views Hardware» more  ERSA 2004»
10 years 4 months ago
QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia Platforms
Advanced multimedia applications (e.g. based on MPEG-4) will consist of multiple scalable multimedia objects. This scalability enables the application to adapt to different proces...
Nam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignole...
ERSA
2004
86views Hardware» more  ERSA 2004»
10 years 4 months ago
Incremental Timing Budget Management in Programmable Systems
Delay budget is an excess delay that each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quali...
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
books