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    ERSA
    2004
    83views Hardware» more  ERSA 2004»
    A Reconfigurable Computing Model for Biological Research
    13 years 6 months ago
    A Reconfigurable Computing Model for Biological Research
    Download  www.starbridgesystems.com
    J. Yardley, K. Gilson
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    ERSA
    2004
    192views Hardware» more  ERSA 2004»
    VTSim: A Virtex-II Device Simulator
    13 years 6 months ago
    VTSim: A Virtex-II Device Simulator
    Download  www.ccm.ece.vt.edu
    This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
    Jesse Hunter, Peter Athanas, Cameron Patterson
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    ERSA
    2004
    118views Hardware» more  ERSA 2004»
    Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
    13 years 6 months ago
    Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
    Download  eprints.eemcs.utwente.nl
    Paul M. Heysters, Gerard J. M. Smit, Egbert Molenk...
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    ERSA
    2004
    130views Hardware» more  ERSA 2004»
    Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
    13 years 6 months ago
    Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
    Download  halcyon.usc.edu
    Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
    Ronald Scrofano, Viktor K. Prasanna
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    ERSA
    2004
    148views Hardware» more  ERSA 2004»
    Efficient Floating-point Based Block LU Decomposition on FPGAs
    13 years 6 months ago
    Efficient Floating-point Based Block LU Decomposition on FPGAs
    Download  halcyon.usc.edu
    In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
    Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
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    ERSA
    2004
    134views Hardware» more  ERSA 2004»
    A High Performance Application Representation for Reconfigurable Systems
    13 years 6 months ago
    A High Performance Application Representation for Reconfigurable Systems
    Download  cseweb.ucsd.edu
    Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
    Wenrui Gong, Gang Wang, Ryan Kastner
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    ERSA
    2004
    158views Hardware» more  ERSA 2004»
    Virtualization of Hardware - Introduction and Survey
    13 years 6 months ago
    Virtualization of Hardware - Introduction and Survey
    Download  homepages.uni-paderborn.de
    Christian Plessl, Marco Platzner
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    ERSA
    2004
    129views Hardware» more  ERSA 2004»
    A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
    13 years 6 months ago
    A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
    Download  halcyon.usc.edu
    Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
    Jingzhao Ou, Viktor K. Prasanna
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    ERSA
    2004
    106views Hardware» more  ERSA 2004»
    QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia Platforms
    13 years 6 months ago
    QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia Platforms
    Download  www.esat.kuleuven.be
    Advanced multimedia applications (e.g. based on MPEG-4) will consist of multiple scalable multimedia objects. This scalability enables the application to adapt to different proces...
    Nam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignole...
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    ERSA
    2004
    86views Hardware» more  ERSA 2004»
    Incremental Timing Budget Management in Programmable Systems
    13 years 6 months ago
    Incremental Timing Budget Management in Programmable Systems
    Download  www.ics.uci.edu
    Delay budget is an excess delay that each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quali...
    Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
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