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    ERSA
    2009
    185views Hardware» more  ERSA 2009»
    Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
    13 years 2 months ago
    Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
    Download  homepages.uni-paderborn.de
    In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
    Mariusz Grad, Christian Plessl
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    ERSA
    2009
    149views Hardware» more  ERSA 2009»
    Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators
    13 years 2 months ago
    Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators
    Download  www.ee.cooper.edu
    Many scientific and engineering applications, which are increasingly being ported from software to reconfigurable platforms, require Gaussian-distributed random numbers. Thus, the...
    Hassan Edrees, Brian Cheung, McCullen Sandora, Dav...
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    ERSA
    2009
    175views Hardware» more  ERSA 2009»
    The Speedy DDR2 Controller For FPGAs
    13 years 2 months ago
    The Speedy DDR2 Controller For FPGAs
    Download  research.microsoft.com
    Ray Bittner
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