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    DAC
    2005
    ACM
    109views Computer Architecture» more  DAC 2005»
    Device and architecture co-optimization for FPGA power reduction
    14 years 5 months ago
    Device and architecture co-optimization for FPGA power reduction
    Download  www.ee.ucla.edu
    Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
    Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
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