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HIPEAC
2007
Springer
9 years 2 months ago
Sunflower :  Full-System, Embedded Microarchitecture Evaluation
Abstract. This paper describes Sunflower, a full-system microarchitectural evaluation environment for embedded computing systems. The environment enables detailed microarchitectura...
Phillip Stanley-Marbell, Diana Marculescu
HIPEAC
2007
Springer
9 years 2 months ago
Customizing the Datapath and ISA of Soft VLIW Processors
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
Mazen A. R. Saghir, Mohamad El-Majzoub, Patrick Ak...
HIPEAC
2007
Springer
9 years 2 months ago
Efficient Program Power Behavior Characterization
Fine-grained program power behavior is useful in both evaluating power optimizations and observing power optimization opportunities. Detailed power simulation is time consuming and...
Chunling Hu, Daniel A. Jiménez, Ulrich Krem...
HIPEAC
2007
Springer
9 years 4 months ago
A Throughput-Driven Task Creation and Mapping for Network Processors
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-C...
HIPEAC
2007
Springer
9 years 4 months ago
Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling
Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, C...
HIPEAC
2007
Springer
9 years 4 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
HIPEAC
2007
Springer
9 years 4 months ago
Compiler-Assisted Memory Encryption for Embedded Processors
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
Vijay Nagarajan, Rajiv Gupta, Arvind Krishnaswamy
HIPEAC
2007
Springer
9 years 4 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
HIPEAC
2007
Springer
9 years 4 months ago
Branch History Matching: Branch Predictor Warmup for Sampled Simulation
Computer architects and designers rely heavily on simulation. The downside of simulation is that it is very time-consuming — simulating an industry-standard benchmark on today...
Simon Kluyskens, Lieven Eeckhout
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