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IESS
2007
Springer
92views Hardware» more  IESS 2007»
13 years 10 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
IESS
2007
Springer
110views Hardware» more  IESS 2007»
13 years 10 months ago
Run-Time efficient Feasibility Analysis of Uni-Processor Systems with Static Priorities
: The performance of feasibility tests is crucial in many applications. When using feasibility tests online only a limited amount of analysis time is available. Run-time efficiency...
Karsten Albers, Frank Bodmann, Frank Slomka