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ISCA
2007
IEEE
217views Hardware» more  ISCA 2007»
9 years 5 months ago
Parallel Processing of High-Dimensional Remote Sensing Images Using Cluster Computer Architectures
Hyperspectral sensors represent the most advanced instruments currently available for remote sensing of the Earth. The high spatial and spectral resolution of the images supplied ...
David Valencia, Antonio Plaza, Pablo Martín...
ISCA
2007
IEEE
130views Hardware» more  ISCA 2007»
9 years 5 months ago
Non-Inclusion Property in Multi-Level Caches Revisited
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...
Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj F...
ISCA
2007
IEEE
94views Hardware» more  ISCA 2007»
9 years 5 months ago
Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits
In recent years, quantum computing (QC) research has moved from the realm of theoretical physics and mathematics into real implementations [9]. With many different potential hardw...
Eric Chi, Stephen A. Lyon, Margaret Martonosi
ISCA
2007
IEEE
116views Hardware» more  ISCA 2007»
9 years 5 months ago
A 64-bit stream processor architecture for scientific applications
Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng, J...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
9 years 12 months ago
Automated design of application specific superscalar processors: an analytical approach
Analytical modeling is applied to the automated design of application-specific superscalar processors. Using an analytical method bridges the gap between the size of the design sp...
Tejas Karkhanis, James E. Smith
ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
10 years 5 hour ago
Matrix scheduler reloaded
From multiprocessor scale-up to cache sizes to the number of reorder-buffer entries, microarchitects wish to reap the benefits of more computing resources while staying within po...
Peter G. Sassone, Jeff Rupley, Edward Brekelbaum, ...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
10 years 5 hour ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
10 years 5 hour ago
Virtual hierarchies to support server consolidation
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
Michael R. Marty, Mark D. Hill
ISCA
2007
IEEE
113views Hardware» more  ISCA 2007»
10 years 5 hour ago
Thermal modeling and management of DRAM memory systems
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard Da...
ISCA
2007
IEEE
126views Hardware» more  ISCA 2007»
10 years 5 hour ago
Comparing memory systems for chip multiprocessors
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...
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