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    ISLPED
    1999
    ACM
    85views Hardware» more  ISLPED 1999»
    Non-stationary effects in trace-driven power analysis
    13 years 9 months ago
    Non-stationary effects in trace-driven power analysis
    Download  www.ece.cmu.edu
    Radu Marculescu, Diana Marculescu, Massoud Pedram
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    ISLPED
    1999
    ACM
    90views Hardware» more  ISLPED 1999»
    Way-predicting set-associative cache for high performance and low energy consumption
    13 years 9 months ago
    Way-predicting set-associative cache for high performance and low energy consumption
    Download  www.c.csce.kyushu-u.ac.jp
    This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...
    Koji Inoue, Tohru Ishihara, Kazuaki Murakami
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    ISLPED
    1999
    ACM
    143views Hardware» more  ISLPED 1999»
    Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
    13 years 9 months ago
    Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
    Download  iacoma.cs.uiuc.edu
    Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
    Kanad Ghose, Milind B. Kamble
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    ISLPED
    1999
    ACM
    72views Hardware» more  ISLPED 1999»
    The design of a low energy FPGA
    13 years 9 months ago
    The design of a low energy FPGA
    Download  bwrc.eecs.berkeley.edu
    George Varghese, Hui Zhang, Jan M. Rabaey
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    ISLPED
    1999
    ACM
    131views Hardware» more  ISLPED 1999»
    Challenges in clockgating for a low power ASIC methodology
    13 years 9 months ago
    Challenges in clockgating for a low power ASIC methodology
    Download  www.cs.utah.edu
    Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
    David Garrett, Mircea R. Stan, Alvar Dean
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    ISLPED
    1999
    ACM
    86views Hardware» more  ISLPED 1999»
    Power macro-models for DSP blocks with application to high-level synthesis
    13 years 9 months ago
    Power macro-models for DSP blocks with application to high-level synthesis
    Download  www.eecg.toronto.edu
    Abstract – In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, suc...
    Subodh Gupta, Farid N. Najm
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    ISLPED
    1999
    ACM
    236views Hardware» more  ISLPED 1999»
    Modeling and automating selection of guarding techniques for datapath elements
    13 years 9 months ago
    Modeling and automating selection of guarding techniques for datapath elements
    Download  www.cecs.uci.edu
    While guarded evaluation has proven an effective energy saving technique in arithmetic circuits, good methodologies do not exist for determining when and how to guard for maximal ...
    William E. Dougherty, Donald E. Thomas
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    ISLPED
    1999
    ACM
    103views Hardware» more  ISLPED 1999»
    A low energy architecture for fast PN acquisition
    13 years 9 months ago
    A low energy architecture for fast PN acquisition
    Download  www.cecs.uci.edu
    Christopher Deng, Charles Chien
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    ISLPED
    1999
    ACM
    150views Hardware» more  ISLPED 1999»
    Using dynamic cache management techniques to reduce energy in a high-performance processor
    13 years 9 months ago
    Using dynamic cache management techniques to reduce energy in a high-performance processor
    Download  www.cs.york.ac.uk
    In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
    Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
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    ISLPED
    1999
    ACM
    63views Hardware» more  ISLPED 1999»
    Energy-efficient dynamic circuit design in the presence of crosstalk noise
    13 years 9 months ago
    Energy-efficient dynamic circuit design in the presence of crosstalk noise
    Download  www.cecs.uci.edu
    Ganesh Balamurugan, Naresh R. Shanbhag
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