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ISPASS
2008
IEEE
10 years 4 months ago
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
Lee Baugh, Craig B. Zilles
ISPASS
2008
IEEE
10 years 4 months ago
Program Phase Detection based on Critical Basic Block Transitions
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
Paruj Ratanaworabhan, Martin Burtscher
ISPASS
2008
IEEE
10 years 4 months ago
Investigating the TLB Behavior of High-end Scientific Applications on Commodity Microprocessors
The floating point portion of the SPEC CPU suite and the HPC Challenge suite are widely recognized and utilized as benchmarks that represent scientific application behavior. In th...
Collin McCurdy, Alan L. Cox, Jeffrey S. Vetter
ISPASS
2008
IEEE
10 years 4 months ago
Conservative vs. Optimistic Parallelization of Stateful Network Intrusion Detection
This paper presents and experimentally evaluates two parallelization strategies for the popular open-source Snort network intrusion detection system (NIDS). Snort identifies intr...
Derek L. Schuff, Yung Ryn Choe, Vijay S. Pai
ISPASS
2008
IEEE
10 years 4 months ago
Explaining the Impact of Network Transport Protocols on SIP Proxy Performance
This paper characterizes the impact that the use of UDP versus TCP has on the performance and scalability of the OpenSER SIP proxy server. The Session Initiation Protocol (SIP) is...
Kaushik Kumar Ram, Ian C. Fedeli, Alan L. Cox, Sco...
ISPASS
2008
IEEE
10 years 4 months ago
Configurational Workload Characterization
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
ISPASS
2008
IEEE
10 years 4 months ago
Pinpointing and Exploiting Opportunities for Enhancing Data Reuse
—The potential for improving the performance of data-intensive scientific programs by enhancing data reuse in cache is substantial because CPUs are significantly faster than me...
Gabriel Marin, John M. Mellor-Crummey
ISPASS
2008
IEEE
10 years 4 months ago
Independent Component Analysis and Evolutionary Algorithms for Building Representative Benchmark Subsets
— This work addresses the problem of building representative subsets of benchmarks from an original large set of benchmarks, using statistical analysis techniques. The subsets sh...
Vassilios N. Christopoulos, David J. Lilja, Paul R...
ISPASS
2008
IEEE
10 years 4 months ago
Dynamic Thermal Management through Task Scheduling
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
Jun Yang 0002, Xiuyi Zhou, Marek Chrobak, Youtao Z...
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