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ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
13 years 2 months ago
Managing verification error traces with bounded model debugging
Managing long verification error traces is one of the key challenges of automated debugging engines. Today, debuggers rely on the iterative logic array to model sequential behavior...
Sean Safarpour, Andreas G. Veneris, Farid N. Najm