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FPL
2000
Springer
119views Hardware» more  FPL 2000»
13 years 8 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
13 years 8 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
ASPDAC
2006
ACM
89views Hardware» more  ASPDAC 2006»
13 years 10 months ago
CGTA: current gain-based timing analysis for logic cells
This paper introduces a new current-based cell timing analyzer, called CGTA, which has a higher performance than existing logic cell timing analysis tools. CGTA relies on a compac...
Shahin Nazarian, Massoud Pedram, Tao Lin, Emre Tun...