ICISC
2009
13 years 2 months ago
2009
Several dual-rail logic styles make use of single-rail flip-flops for storing intermediate states. We show that single mask bits, as applied by various side-channel resistant logic...
ISMVL
2003
IEEE
13 years 10 months ago
2003
IEEE
A new multiple-valued current-mode (MVCM) integrated circuit based on dynamic source-coupled logic (SCL) is proposed for low-power VLSI applications. The use of a precharge-evalua...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...