RTAS
1998
IEEE
13 years 8 months ago
1998
IEEE
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
PPOPP
2003
ACM
13 years 9 months ago
2003
ACM
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
EMSOFT
2005
Springer
13 years 10 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
ICPADS
2006
IEEE
13 years 10 months ago
2006
IEEE
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
IEEEPACT
2008
IEEE
13 years 11 months ago
2008
IEEE
This work proposes and evaluates improvements to previously known algorithms for redundancy elimination. Enhanced Scalar Replacement combines two classic techniques, scalar replac...
ICCAD
2008
IEEE
14 years 1 months ago
2008
IEEE
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...