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    ASPDAC
    2006
    ACM
    95views Hardware» more  ASPDAC 2006»
    The design and implementation of a low-latency on-chip network
    13 years 10 months ago
    The design and implementation of a low-latency on-chip network
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    — Many of the issues that will be faced by the designers of multi-billion transistor chips may be alleviated by the presence of a flexible global communication infrastructure. I...
    Robert D. Mullins, Andrew West, Simon W. Moore
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