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MICRO
2000
IEEE
61views Hardware» more  MICRO 2000»
13 years 9 months ago
Reducing wire delay penalty through value prediction
In this work we show that value prediction can be used to avoid the penalty of long wire delays by predicting the data that is communicated through these long wires and validating...
Joan-Manuel Parcerisa, Antonio González
MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
13 years 9 months ago
Performance improvement with circuit-level speculation
Current superscalar microprocessors’ performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). In this paper we propose a...
Tong Liu, Shih-Lien Lu
MICRO
2000
IEEE
80views Hardware» more  MICRO 2000»
13 years 9 months ago
Silent stores for free
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
Kevin M. Lepak, Mikko H. Lipasti
MICRO
2000
IEEE
90views Hardware» more  MICRO 2000»
13 years 9 months ago
Eager writeback - a technique for improving bandwidth utilization
Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farre...
MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
13 years 9 months ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin
MICRO
2000
IEEE
137views Hardware» more  MICRO 2000»
13 years 9 months ago
Relational profiling: enabling thread-level parallelism in virtual machines
Virtual machine service threads can perform many tasks in parallel with program execution such as garbage collection, dynamic compilation, and profile collection and analysis. Har...
Timothy H. Heil, James E. Smith
MICRO
2000
IEEE
98views Hardware» more  MICRO 2000»
13 years 9 months ago
Efficient conditional operations for data-parallel architectures
Many data-parallel applications, including emerging media applications, have regular structures that can easily be expressed as a series of arithmetic kernels operating on data st...
Ujval J. Kapasi, William J. Dally, Scott Rixner, P...
MICRO
2000
IEEE
84views Hardware» more  MICRO 2000»
13 years 9 months ago
The impact of delay on the design of branch predictors
Modern microprocessors employ increasingly complicated branch predictors to achieve instruction fetch bandwidth that is sufficient for wide out-of-order execution cores. While ex...
Daniel A. Jiménez, Stephen W. Keckler, Calv...
MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
13 years 9 months ago
Efficient checker processor design
The design and implementation of a modern microprocessor creates many reliability challenges. Designers must verify the correctness of large complex systems and construct implemen...
Saugata Chatterjee, Christopher T. Weaver, Todd M....
MICRO
2000
IEEE
96views Hardware» more  MICRO 2000»
13 years 9 months ago
Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors
We investigate instruction distribution methods for quadcluster, dynamically-scheduled superscalar processors. We study a variety of methods with different cost, performance and c...
Amirali Baniasadi, Andreas Moshovos