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MICRO
2010
IEEE
111views Hardware» more  MICRO 2010»
9 years 9 months ago
Putting Faulty Cores to Work
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the ...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
MICRO
2010
IEEE
90views Hardware» more  MICRO 2010»
9 years 9 months ago
Moving Forward
David H. Albonesi
MICRO
2010
IEEE
102views Hardware» more  MICRO 2010»
9 years 9 months ago
Gatekeeping Economics
Shane Greenstein
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
9 years 9 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
9 years 9 months ago
Task Superscalar: An Out-of-Order Task Pipeline
We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential...
Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex...
MICRO
2010
IEEE
143views Hardware» more  MICRO 2010»
9 years 9 months ago
SD3: A Scalable Approach to Dynamic Data-Dependence Profiling
Abstract--As multicore processors are deployed in mainstream computing, the need for software tools to help parallelize programs is increasing dramatically. Data-dependence profili...
Minjang Kim, Hyesoon Kim, Chi-Keung Luk
MICRO
2010
IEEE
161views Hardware» more  MICRO 2010»
10 years 20 days ago
AtomTracker: A Comprehensive Approach to Atomic Region Inference and Violation Detection
A particularly insidious type of concurrency bug is atomicity violations. While there has been substantial work on automatic detection of atomicity violations, each existing techn...
Abdullah Muzahid, Norimasa Otsuki, Josep Torrellas
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