CAV
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Regular model checking is a form of symbolic model checking technique for systems whose states can be represented as finite words over a finite alphabet, where regular ...
ATVA
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Bounded model checking (BMC) is a technique for overcoming the state explosion problem which has gained wide industrial acceptance. Bounded model checking is typically ap...
ATAL
2007
Springer
13 years 11 months ago
2007
Springer
In this paper we enrich FIEVeL (a modelling language for institutions amenable to model checking) with new constructs to describe norms and sanctions. Moreover, we present a speci...
ATAL
2007
Springer
13 years 11 months ago
2007
Springer
We propose a new class of representations that can be used for modeling (and model checking) temporal, strategic and epistemic properties of agents and their teams. Our representa...
AB
2007
Springer
13 years 11 months ago
2007
Springer
A series of papers, all under the title of Algorithmic Algebraic Model Checking (AAMC), has sought to combine techniques from algorithmic algebra, model checking and dynamical syst...
TASE
2007
IEEE
13 years 11 months ago
2007
IEEE
Software has been under scrutiny by the verification community from various angles in the recent past. There are two major algorithmic approaches to ensure the correctness of and...
TASE
2007
IEEE
13 years 11 months ago
2007
IEEE
Symmetry reduction is a technique that can help alleviate the problem of state space explosion in model checking. The idea is to verify only a subset of states from each class (or...
TASE
2007
IEEE
13 years 11 months ago
2007
IEEE
Software model checkers work directly on single-process programs, but not on multiple processes. Conversion of processes into threads, combined with a network model, allows for mo...
TASE
2007
IEEE
13 years 11 months ago
2007
IEEE
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...
QEST
2007
IEEE
13 years 11 months ago
2007
IEEE
Failure Mode and Effect Analysis (FMEA) is a method for assessing cause-consequence relations between component faults and hazards that may occur during the lifetime of a system. ...