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    ASPDAC
    1995
    ACM
    77views Hardware» more  ASPDAC 1995»
    A scheduling algorithm for synthesis of bus-partitioned architectures
    13 years 8 months ago
    A scheduling algorithm for synthesis of bus-partitioned architectures
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    - Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
    Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
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