PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
In this paper, we present a thorough analysis of thread-level parallelism available in production High Performance Computing (HPC) codes. We survey a number of techniques that are...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
We have developed a transaction-based approach to distributed shared memory(DSM) that supports object caching and generates path expression prefetches. A path expression specifies...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
This paper proposes a new parallel execution model where programmers augment a sequential program with pieces of code called serializers that dynamically map computational operati...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
Transactional Memory (TM) is being studied widely as a new technique for synchronizing concurrent accesses to shared memory data structures for use in multi-core systems. Much of ...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM
Understanding why the performance of a multithreaded program does not improve linearly with the number of cores in a sharedmemory node populated with one or more multicore process...
PPOPP
2009
ACM
14 years 10 months ago
2009
ACM