ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
— This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in addition to macromodel ...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
As interconnect feature sizes continue to scale to smaller dimensions, long interconnect can dominate the IC timing performance, but the interconnect parameter variations make it ...