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SASP
2008
IEEE
153views Hardware» more  SASP 2008»
12 years 8 months ago
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik...
SASP
2008
IEEE
77views Hardware» more  SASP 2008»
12 years 8 months ago
Resource Sharing in Custom Instruction Set Extensions
Abstract—Customised processor performance generally increases as additional custom instructions are added. However, performance is not the only metric that modern systems must ta...
Marcela Zuluaga, Nigel P. Topham
SASP
2008
IEEE
95views Hardware» more  SASP 2008»
12 years 8 months ago
Extensible On-Chip Peripherals
Bharat Sukhwani, Alessandro Forin, Richard Neil Pi...
SASP
2008
IEEE
94views Hardware» more  SASP 2008»
12 years 8 months ago
An MDCT Hardware Accelerator for MP3 Audio
— With the increasing popularity of MP3 audio, there is a need to develop cost and power efficient architectures for the MP3 encoder and decoder. This paper describes dedicated ...
Xingdong Dai, Meghanad D. Wagh
SASP
2008
IEEE
101views Hardware» more  SASP 2008»
12 years 8 months ago
Custom Processor Core Construction from C Code
—In this paper we present a method for construction of application specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying t...
Jelena Trajkovic, Daniel D. Gajski
SASP
2008
IEEE
164views Hardware» more  SASP 2008»
12 years 8 months ago
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishito...
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
12 years 8 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
12 years 8 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
12 years 8 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
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