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DATE
2008
IEEE
163views Hardware» more  DATE 2008»
13 years 11 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
CISS
2008
IEEE
13 years 11 months ago
Distributed processing in frames for sparse approximation
—Beyond signal processing applications, frames are also powerful tools for modeling the sensing and information processing of many biological and man-made systems that exhibit in...
Christopher J. Rozell
SASP
2009
IEEE
170views Hardware» more  SASP 2009»
13 years 11 months ago
Parade: A versatile parallel architecture for accelerating pulse train clustering
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
Amin Ansari, Dan Zhang, Scott A. Mahlke