DSN
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
—Soft error rates are an increasing problem in modern VLSI circuits. Commonly used error correcting codes reduce soft error rates in large memories and second level caches but ar...
VLSID
2003
IEEE
14 years 4 months ago
2003
IEEE
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
VLSID
2006
IEEE
14 years 4 months ago
2006
IEEE
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...