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EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
13 years 9 months ago
A general state graph transformation framework for asynchronous synthesis
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekberg...