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SPAA
2010
ACM
10 years 9 months ago
TLRW: return of the read-write lock
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible readers. In fact, no modern STM design locks to read along its common execution path b...
David Dice, Nir Shavit
CAV
2009
Springer
177views Hardware» more  CAV 2009»
11 years 5 months ago
Software Transactional Memory on Relaxed Memory Models
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
books