Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce ...