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ICCAD
1998
IEEE
79views Hardware» more  ICCAD 1998»
13 years 8 months ago
Reencoding for cycle-time minimization under fixed encoding length
This paper presents efficient reencoding and resynthesis algorithms for cycle-time minimization of multilevel implementations of synchronous finite state machines (FSMs) under a fi...
Balakrishnan Iyer, Maciej J. Ciesielski
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
13 years 10 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 1 months ago
State re-encoding for peak current minimization
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
Shih-Hsu Huang, Chia-Ming Chang, Yow-Tyng Nieh