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TCAD
2011
8 years 1 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
TCAD
2011
8 years 2 months ago
Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs
—Pre-bond testing of 3-D stacked integrated circuits (ICs) involves testing each individual die before bonding. The overall yield of 3-D ICs improves with pre-bond testability be...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
TCAD
2011
8 years 2 months ago
Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains
—This paper presents a hybrid automatic test pattern generation (ATPG) technique using the staggered launch-oncapture (LOC) scheme followed by the one-hot LOC scheme for testing ...
Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhig...
TCAD
2011
8 years 2 months ago
GRIP: Global Routing via Integer Programming
Abstract—This work introduces GRIP, a global routing technique via integer programming. GRIP optimizes wirelength and via cost directly without going through a traditional layer ...
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
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