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TMM
2010
152views Management» more  TMM 2010»
7 years 11 months ago
Browsing Video Along Multiple Threads
This paper describes a novel method for browsing a large video collection. It links various forms of related video fragments together as threads. These threads are based on query r...
Ork de Rooij, Marcel Worring
JCST
2010
198views more  JCST 2010»
7 years 11 months ago
Certification of Thread Context Switching
With recent efforts to build foundational certified software systems, two different approaches have been proposed to certify thread context switching. One is to certify both thread...
Yu Guo, Xinyu Jiang, Yiyun Chen
MICRO
2011
IEEE
407views Hardware» more  MICRO 2011»
7 years 11 months ago
Thread Cluster Memory Scheduling
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...
IANDC
2010
125views more  IANDC 2010»
8 years 1 months ago
A thread calculus with molecular dynamics
In a previous paper, we developed an algebraic theory of threads, interleaving of threads, and interaction between threads and services. In the current paper, we extend that theory...
Jan A. Bergstra, C. A. Middelburg
ICPP
2009
IEEE
8 years 2 months ago
Thread Merging Schemes for Multithreaded Clustered VLIW Processors
Several multithreading techniques have been proposed to reduce the resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is ...
Manoj Gupta, Fermín Sánchez, Josep L...
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
8 years 2 months ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
MICRO
2010
IEEE
210views Hardware» more  MICRO 2010»
8 years 2 months ago
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...
IPPS
2010
IEEE
8 years 2 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
IPPS
2010
IEEE
8 years 2 months ago
Exploiting inter-thread temporal locality for chip multithreading
Multi-core organizations increasingly support multiple threads per core. Threads on a core usually share a single first-level data cache, so thread schedulers must try to minimize ...
Jiayuan Meng, Jeremy W. Sheaffer, Kevin Skadron
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