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ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
9 years 9 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
IPPS
2006
IEEE
9 years 9 months ago
Timed automata based analysis of embedded system architectures
We show that timed automata can be used to model and to analyze timeliness properties of embedded system architectures. Using a case study inspired by industrial practice, we pres...
Martijn Hendriks, Marcel Verhoef
GPCE
2007
Springer
9 years 10 months ago
Aspects of availability
In this paper, we propose a domain-specific aspect language to prevent the denials of service caused by resource management. Our aspects specify availability policies by enforcin...
Pascal Fradet, Stéphane Hong Tuan Ha
FSEN
2007
Springer
9 years 10 months ago
Zone-Based Universality Analysis for Single-Clock Timed Automata
Abstract. During the last years, timed automata have become a popular model for describing the behaviour of real-time systems. In particular, there has been much research on proble...
Parosh Aziz Abdulla, Joël Ouaknine, Karin Qua...
FORMATS
2007
Springer
9 years 10 months ago
Undecidability of Universality for Timed Automata with Minimal Resources
Timed automata were introduced by Alur and Dill in the early 1990s and have since become the most prominent modelling formalism for real-time systems. A fundamental limit to the al...
Sara Adams, Joël Ouaknine, James Worrell
ASWEC
2007
IEEE
9 years 10 months ago
Timed Behavior Trees and Their Application to Verifying Real-Time Systems
Behavior Trees (BTs) are a graphical notation used for formalising functional requirements and have been successfully applied to several case studies. However, the notation curren...
Lars Grunske, Kirsten Winter, Robert Colvin
QEST
2008
IEEE
9 years 10 months ago
Quantitative Model-Checking of One-Clock Timed Automata under Probabilistic Semantics
In [3] a probabilistic semantics for timed automata has been defined in order to rule out unlikely (sequences of) events. The qualitative model-checking problem for LTL propertie...
Nathalie Bertrand, Patricia Bouyer, Thomas Brihaye...
SACMAT
2009
ACM
9 years 10 months ago
Towards formal security analysis of GTRBAC using timed automata
An access control system is often viewed as a state transition system. Given a set of access control policies, a general safety requirement in such a system is to determine whethe...
Samrat Mondal, Shamik Sural, Vijayalakshmi Atluri
FSEN
2009
Springer
9 years 10 months ago
Modular Schedulability Analysis of Concurrent Objects in Creol
We present an automata theoretic framework for modular schedulability analysis of real time asynchronous objects modeled in the language Creol. In previous work we analyzed the sch...
Frank S. de Boer, Tom Chothia, Mohammad Mahdi Jagh...
FORMATS
2009
Springer
9 years 10 months ago
Synthesis of Non-Interferent Timed Systems
In this paper, we focus on the synthesis of secure timed systems which are given by timed automata. The security property that the system must satisfy is a non-interference propert...
Gilles Benattar, Franck Cassez, Didier Lime, Olivi...
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