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DATE
2000
IEEE
65views Hardware» more  DATE 2000»
13 years 9 months ago
Test Quality and Fault Risk in Digital Filter Datapath BIST
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
Laurence Goodby, Alex Orailoglu
DSD
2007
IEEE
83views Hardware» more  DSD 2007»
13 years 11 months ago
Hierarchical Identification of Untestable Faults in Sequential Circuits
Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability id...
Jaan Raik, Raimund Ubar, Anna Krivenko, Margus Kru...