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    GLVLSI
    2000
    IEEE
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    A wave-pipelined router architecture using ternary associative memory
    13 years 9 months ago
    A wave-pipelined router architecture using ternary associative memory
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    In this paper a wave-pipelining scheme is used to increase the performance of a router architecture. Wave-pipelining has a potential of significantly reducing clock cycle time an...
    José G. Delgado-Frias, Jabulani Nyathi, Lax...
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