DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of severa...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...