Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

8

FPL
2005
Springer

favoriteEmaildiscussreport

96views Hardware» more FPL 2005»

FELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations

13 years 10 months ago

FELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations

Download helios.informatik.uni-kl.de

Carlos Morra, Jürgen Becker, Mauricio Ayala-R

Real-time Traffic

FPL 2005 |

claim paper

Related Content

» From Equation to VHDL Using Rewriting Logic for Automated Function Generation

» On the Implementation of Construction Functions for Nonfree Concrete Data Types

» Combinational equivalence checking for threshold logic circuits

» Functional Validation of Programmable Architectures

» Transistor abstraction for the functional verification of FPGAs

» Scrap your nameplate functional pearl

» Formal verification of ASMs using MDGs

» Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Enviro...

» Melange creating a functional internet

Post Info
More Details (n/a)

Added	27 Jun 2010
Updated	27 Jun 2010
Type	Conference
Year	2005
Where	FPL
Authors	Carlos Morra, Jürgen Becker, Mauricio Ayala-Rincón, Reiner W. Hartenstein

Comments (0)